Synchronous interfaces involve a single clock domain and are relatively easy to design. However, at times, it is advantageous and necessary to have an asynchronous interface between peripherals for ...

This paper discusses an approach to timing closure to eliminate non-determinism in an asynchronous interface while performing AC characterization on ATE (automatic test equipment). By closing the ...

Today's leading-edge system-on-chip (SoC) designs typically have multiple clock domains and, in many cases, multiple internally generated clocks. In test mode, those clocks may be combined into one, ...